cpu_arm64_hwcap.go

Documentation: internal/cpu

     1  // Copyright 2020 The Go Authors. All rights reserved.
     2  // Use of this source code is governed by a BSD-style
     3  // license that can be found in the LICENSE file.
     4  
     5  //go:build arm64 && linux
     6  
     7  package cpu
     8  
     9  // HWCap may be initialized by archauxv and
    10  // should not be changed after it was initialized.
    11  var HWCap uint
    12  
    13  // HWCAP bits. These are exposed by Linux.
    14  const (
    15  	hwcap_AES     = 1 << 3
    16  	hwcap_PMULL   = 1 << 4
    17  	hwcap_SHA1    = 1 << 5
    18  	hwcap_SHA2    = 1 << 6
    19  	hwcap_CRC32   = 1 << 7
    20  	hwcap_ATOMICS = 1 << 8
    21  	hwcap_CPUID   = 1 << 11
    22  	hwcap_SHA512  = 1 << 21
    23  )
    24  
    25  func hwcapInit(os string) {
    26  	// HWCap was populated by the runtime from the auxiliary vector.
    27  	// Use HWCap information since reading aarch64 system registers
    28  	// is not supported in user space on older linux kernels.
    29  	ARM64.HasAES = isSet(HWCap, hwcap_AES)
    30  	ARM64.HasPMULL = isSet(HWCap, hwcap_PMULL)
    31  	ARM64.HasSHA1 = isSet(HWCap, hwcap_SHA1)
    32  	ARM64.HasSHA2 = isSet(HWCap, hwcap_SHA2)
    33  	ARM64.HasCRC32 = isSet(HWCap, hwcap_CRC32)
    34  	ARM64.HasCPUID = isSet(HWCap, hwcap_CPUID)
    35  	ARM64.HasSHA512 = isSet(HWCap, hwcap_SHA512)
    36  
    37  	// The Samsung S9+ kernel reports support for atomics, but not all cores
    38  	// actually support them, resulting in SIGILL. See issue #28431.
    39  	// TODO(elias.naur): Only disable the optimization on bad chipsets on android.
    40  	ARM64.HasATOMICS = isSet(HWCap, hwcap_ATOMICS) && os != "android"
    41  
    42  	// Check to see if executing on a Neoverse core and in order to do that,
    43  	// check the AUXV for the CPUID bit. The getMIDR function executes an
    44  	// instruction which would normally be an illegal instruction, but it's
    45  	// trapped by the kernel, the value sanitized and then returned.
    46  	// Without the CPUID bit the kernel will not trap the instruction and the
    47  	// process will be terminated with SIGILL.
    48  	if ARM64.HasCPUID {
    49  		midr := getMIDR()
    50  		part_num := uint16((midr >> 4) & 0xfff)
    51  		implementor := byte((midr >> 24) & 0xff)
    52  
    53  		// d0c - NeoverseN1
    54  		// d40 - NeoverseV1
    55  		// d49 - NeoverseN2
    56  		// d4f - NeoverseV2
    57  		if implementor == 'A' && (part_num == 0xd0c || part_num == 0xd40 ||
    58  			part_num == 0xd49 || part_num == 0xd4f) {
    59  			ARM64.IsNeoverse = true
    60  		}
    61  	}
    62  }
    63  
    64  func isSet(hwc uint, value uint) bool {
    65  	return hwc&value != 0
    66  }
    67
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